SPG1000

Features & Benefits

• HDTV Master or Slave Sync Generator
• Three Trilevel Sync and One Set of Test-Signal Outputs
• Sync Locks to HDTV, NTSC, and PAL Signals
• Genlock and Sync Timing Controls
• Test Signals to Support Postproduction Operations
• Supplies Genlock Function for TSG1000-Series Generators
• Ground Closure or RS-232 Remote Control

Applications

• Master or Slave Sync Generation in HDTV Production Environment

The SPG1000 is a multiformat HDTV Sync Generator. Designed to support the HDTV production environment, the SPG1000 also provides a genlock function and an external clock source for the TSG1000 Series Programmable and HDTV Generators.

Sync Generator

The SPG1000 provides master and slave sync generator capabilities for multiformat HDTV production environment. Independent selection of output and genlock input formats (see Table 1), timing advance and delay controls, and timing presets provide flexibility in system integration. In the absence of an incoming reference signal, the SPG1000 automatically switches to its own stable internal reference.

Test Signals

The SPG1000 test-signal complement is designed to support the operational requirements of the typical postproduction environment. These include picture-monitor setup signals and color bars for tape leaders.

The SPG1000 test-signal set includes:

• 100% color bars
• Pluge with white clip indicator
• Black, grey, white, and red fields
• Convergence pattern with 5% overscan markers
• 5-step grey scale
• Timing signal with 1-ns markers

Test signals are provided in GBR and Y, P_B, P_R format.

Controls and Indicators

All SPG1000 operating selections and timing adjustments may be made from the front panel. Once all selections are made, the front-panel controls may be disabled to prevent accidental changes to user settings. The vacuum fluorescent front-panel display provides information on the front-panel function currently selected.

Remote Control

The SPG1000 will provide RS-232 or ground closure remote control of most front-panel functions. In addition, front-panel settings may be stored and recalled through the remote control port.

Formats Supported

Characteristics

Internal References

Frequencies -

Oscillator 1: 72.000000 MHz ±72 Hz

Oscillator 3: 74.250000 MHz ±74 Hz

Oscillator 4: 74.175824 MHz ±74 Hz

Oscillator 5: 75.524475 MHz ±75 Hz

External Lock Range - ±10 ppm

Clock Outputs

Format - Continuous clock signal with frame information encoded as a missing clock pulse

Frequency - Oscillator frequency

Output Levels - Balanced ECL

Impedance - 78 ohm

Connector - Twin-ax BNO

Return Loss - >30 dB at the clock frequency

SPG1000 rear panel

Test-Signal Generator

Output Formats - GBR and Y, P_B, P_R

Levels -

GBR: 0 to 700 mV in each channel

Y, P_B, P_R: Y channel: 700 mV

P_B, P_R, channels: ±350 mV

Amplitude -

Accuracy: ±1% at 700 mV

Channel Match: ±0.5%; measured between any two channels

Channel-to-Channel Delay (Between Any Two Channels) - ≤1 ns; measured

Signal-to-noise Ratio (to 300 MHz) - >50 dB unweighted

Blanking Level - 0 V DC ±50 mV

Output Impedance - 75 ohm

Return Loss - ≥35 dB to 30 MHz

Test Signals

Color Bars -

GBR 100%: 700 mV all channels

Y, P_B, P_R 100% ±350-mV Color Difference: 700-mV luminance

Pluge -

GBR and Y: 0, 175, 350, 525, and 700-mV amplitude; references; ±35 mV; black-level sets; 840-mV clip indicator

Convergence Pattern - Vertical and horizontal lines with 5% overscan marks

Red Field - 100% amplitude red

Black Field - 0 V all channels

Grey Field -

GBR and Y: 350 mV

P_B, P_R: 0 V

White Field -

GBR and Y: 700 mV

P_B, P_R: 0 V

5-Step Grey Scale -

GBR and Y: 700 mV

Timing Signal - Coarse and fine-timing elements with 1-ns markers

Sync Generator

Output Format - Trilevel

Amplitude -

-300 mV ±1%

+300 mV ±1%

Time Offset -

≤1 ns; measured between any two sync outputs

≤7 ns; typical between sync and test-signal outputs

Sync/Test-Signal Timing Offset -

Reference Point: Clock output

Ranges:

Vertical: ±0.5 frame in one-line steps

Horizontal: ±0.5 line in clock-cycle steps

Fine: ±0.5 clock cycle in steps of approximately 50 ps

Blanking Level - 0 V ±50 mV

Output Impedance - 75 ohm

Return Loss - >30 dB to 30 MHz

GENLOCK

Input Amplitude Range - ±6 dB relative to nominal

Genlock Timing Error as a Function of -

Input Amplitude:

Trilevel sync: ≤0.5 ns; ±3 dB amplitude change

Bilevel sync: ≤1.0 ns; ±3 dB amplitude change

Input APL: ≤0.5 ns; 10% to 90% APL change

Input Hum: ≤0.5 ns; 0.5 V of hum

Input Frequency: ≤0.5 ns; ±10 ppm relative to nominal

Ambient Temperature: ≤1.0 ns; 0 to 50 °C

Jitter -

Trilevel and Bilevel Sync Inputs: ≤0.5 ns; ±3 dB input amplitude change and ≥60 dB input S/N ratio

Trilevel Sync Input: ≤1.0 ns; ±3 dB input amplitude change and ≥35 dB S/N ratio

Bilevel Sync Input: ≤3.0 ns; ±3 dB input amplitude change and ≥35 dB S/N ratio

Genlock Timing Offset -

Reference Point: Genlock input signal

Ranges:

Vertical: ±0.5 frame in one-line steps

Horizontal: ±0.5 line in clock-cycle steps

Fine: ±0.5 clock cycle in steps of approximately 50 ps

Input Impedance - 75 ohm

Return Loss - >40 dB to 5 MHz; >30 dB to 30 MHz

Power Requirements

Mains -

Voltage Range: 90 to 132 or 180 to 250 V AC

Frequency Range: 48 to 66 Hz

Power Consumption - 85 W typical

Environmental

Temperature -

Operating: 0 to 50 °C

Nonoperating: -40 to 65 °C

Certifications

EMC - Certified to the EMC Directive 89/336/EEC

Safety -

Approved to: UL1244, CSA231

Complies with: EN61010-1, IEC61010-1

Physical Characteristics