PED3200 and PED4000 Series Datasheet

PatternPro® Error Detector
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The PED3200 and PED4000 series programmable error detectors offer effective multi-channel BER for stressed receiver testing of data communications designs. Now available with the choice of AC or DC coupled inputs, as well as full or half-rate clock inputs.

Key performance specifications
  • Data rate range:
    • PED3200 series: 3 Gb/s to 32 Gb/s
    • PED4000 series: 4 Gb/s to 40 Gb/s
Key features
  • Available with 1 or 2 input channels (independent data on each channel)
  • PRBS and user defined patterns
  • High input sensitivity and bandwidth
  • Auto-adjustment or manual adjustment of data to clock phase and threshold
  • Auto-synchronization to input pattern
  • PC GUI software:
    • Remote instrument control
    • Bathtub and Contour Analysis
    • JTOL measurements
    • J2/J9 measurements
  • Front panel touch screen GUI or USB TMC computer control
Applications
  • 25 Gb/s testing for 100G Ethernet
  • 32 Gb/s DPQPSK testing
  • Semiconductor and component testing
  • Design validation and production testing
  • Transmitter testing and validation up to 40 Gb/s

Product description

The Tektronix PED line of high sensitivity and high bandwidth error detectors offer single and two-channel standalone configurations capable of BER measurement at data rates up to 40 Gb/s. The PED products support either PRBS or user-defined data patterns, with simple to use automatic or manual alignment of input clock and data, and pattern synchronization. The PED product makes an ideal companion for the Tektronix PPG pattern generator product family.

The PED line of error detectors are offered in two data input configurations:

  • The DC coupled input option can be used either as AC or DC coupled as long as the resulting input falls within the allowed voltage window of -0.6 to 0.2 V. A DC threshold output is provided and, when connected to the unused /data input, allows operation with single ended data input signals.
  • The AC coupled input option allows larger amplitude AC coupled inputs and has built-in differential and single ended programmable threshold adjustments.

Also, either half rate or full rate clock options are available.


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100G Ethernet four lane end-to-end test using PED3200 series error detector and PPG3000 series pattern generator


Specifications

All specifications apply to all models unless noted otherwise.

Data input
Data rate
Range (PED3200)
3 Gb/s to 32 Gb/s
Range (PED4000)
4 Gb/s to 40 Gb/s
DC coupled input option
Ground referenced CML like input. AC coupled data input permitted within allowed voltage window.
Differential amplitude
25 mV to 1.0 Vp-p
Single-ended amplitude
25 mV to 750 mVp-p
Voltage window
-0.6 V to +0.2 V
Termination voltage
0.0 V
Input impedance
50 Ω
Connector
2.4 mm
AC coupled input option
AC coupled input with broadband bias tees featuring a 3 dB bandwidth of 10 kHz to >50 GHz.
Differential amplitude
6 mV to 1.0 Vp-p
Single-ended amplitude
6 mV to 750 mVp-p
Termination voltage
0.0 V
Input impedance
50 Ω
Connector
2.4 mm
ESD sensitivity
250 V, Human body model (HBM)
Threshold output
Output voltage
DC voltage terminated 50 Ω to ground
Range
-0.5 V to 0.125 V
Sampling point set points
Eye edge BER threshold
Range
1e-1 to 1e-11 
Resolution
1e-1 
Sync BER threshold
Range
1e-1 to 1e-8 
Resolution
1e-1 
Full rate clock input option
Amplitude
AC coupled, full rate
Differential range
300 mVP-P to 1.0 VP-P
Single-ended range
300 mVP-P to 1.0 VP-P
Connector
2.4 mm
Clock to data phase adjustment
100 ps (-50 ps to +50 ps)
ESD sensitivity
1000 V, Human body model (HBM)
Half rate clock input option
Amplitude
AC coupled, half rate
Differential range
300 mVP-P to 1.0 VP-P
Single-ended range
300 mVP-P to 1.0 VP-P
Connector
2.4 mm
Clock to data phase adjustment
100 ps (-50 ps to +50 ps)
ESD sensitivity
1000 V, Human body model (HBM)
Data patterns
Pattern type
Data (from memory) or PRBS.

Length and type are individually settable on each channel.

PRBS pattern lengths
27 -1 bits
Polynomial = X7 + X6 + 1 
29 - 1 bits
Polynomial = X9 + X5 + 1 
211 - 1 bits
Polynomial = X11 + X9 + 1 
215 - 1 bits
Polynomial = X15 + X14 + 1 
223 - 1 bits
Polynomial = X23 + X18 + 1 
231 - 1 bits
Polynomial = X31 + X28 + 1 
User-defined pattern depth
Number of channels Single bit pattern resolution
1 channel 4 Mbit
2 channels 2 Mbit
Mechanical
Front panel width (with mounting tabs)
48.3 cm (19.0 in)
Height
13.3 cm (5.25 in)
Width
45.1 cm (17.75 in)
Depth (rack mount)
34.3 cm (13.5 in)
Weight (1 channel)
11.1 kg (24.5 lbs)
Operating temperature
0 °C to 40 °C (32 °F to 104 °F)
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